Re: Lisp on an FPGA

Jürgen Böhm <jboehm@[EMAIL PROTECTED]
> writes:

> Under the working title "LispmFPGA" I recently completed a first
> milestone on the way to an autonomous, "bare metal" Lisp on a CPU
> specifically designed to execute compiled Lisp code.

Great job! Looks like lots of fun. 

> - a Lisp adapted, stack oriented, microprogrammed 32 bit-CPU

I noticed that you had a parser for your microcode assembler. Why not
use Common Lisp? I once wrote a microcode assembler generator. It
would extract the specification from the Verilog HDL (defines to
specify opcodes and bit fields within instructons). It would then
generate the micro-assembler on-the-fly and run it. The microcode
assembly was then using Lisp syntax and took advantage of all the
features of Common Lisp. It was pretty short too, only a couple
hundred lines long.

> All this is implemented with Verilog HDL on a Xilinx Spartan 3 FPGA. The

I think it would be great fun to design a HDL based upon Common Lisp
and write a simulator and synthesis tool (which would transfor the
CL-HDL into EDIF) for it, presumably a parallel version to cut down
the synthesis time for the next generation FPGA's (i.e. 1M LE's).

Good luck on your project!

Petter
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