I didn't try the latest NDISASM, but the 0.98.35 that I have doesn't
disassembly correctly this:
db 0x82, 0xc0, 0x01 ; add Eb, Ib
I get the following disassembly in 16-bit mode:
0000000C 82 db 0x82
0000000D C001B8 rol byte [bx+di],0xb8
Interestingly, this seems to be exactly the same instruction
(functionally) as this one:
db 0x80, 0xc0, 0x01 ; add Eb, Ib
for which I correctly get:
00000006 80C001 add al,0x1
Even more interestingly, the AMD documentation has both of these in
table A-6 of volume 3. In there 82 /r is additionally marked as
invalid in 64-bit mode. Whereas the intel documentation is overly
brief in its table A-6 of volume 2B.
At the same time neither manual in the sections describing ADD/ADC/SUB/
SBB/AND/OR/XOR/CMP lists the 82 /r encoding. Yet, the instructions
with the 82 /r encoding work (in at least non-64-bit modes).
Instructions to be deprecated? :)
Any comments?
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