In message <oc6dnTLn9pEyoZTVnZ2dnUVZ_gmdnZ2d@[EMAIL PROTECTED]
>, Chris Thomasson
<spamtrap@[EMAIL PROTECTED]
> wrote:
> Before I convert this code into AT&T syntax for GAS to assemble, and to
> MASM I was wondering if there are any possible optimizations I can
perform
> on the following code, I will show the C header first:
Use inline functions with inline assembler to avoid the function call
overhead; ensure that your inline assembler is an optimisation barrier.
> __declspec(naked) void
> spinlock_i686_release(
> atomicword_i686* const _this
> ) {
> _asm {
> MOV ECX, [ESP + 4]
> MOV EAX, 0
> MOV [ECX], EAX
> RET
> }
> }
There is no memory barrier here, therefore reads from the structure
protected by the lock can be performed after the lock is released. Also
you
can store a constant into memory.
Replace that with:
MOV ECX, [ESP + 4]
LOCK SUB [ECX], 1
RET
Or on Pentium 4 or later:
MOV ECX, [ESP + 4]
MFENCE
MOV [ECX], 0
RET
You may also consider using CPUID on older processors, however I suspect
that it would be slower due to the need to preserve the contents of the
registers that CPUID changes.
> AFAICT, everything seems to look okay. However, I am not an expert x86
> programmer! Any comments/suggestions would be highly appreciated.
Don't use spinlocks in a preemptive multitasking environment without
disabling preemption.
Consider disabling interrupts whilst the locks are held.
--
Member AFFS, WYLUG, SWP (UK), ANL, RESPECT, Leeds SA, Leeds Anti-war
coalition
No to software patents! No to DRM/EUCD - hands off our computers!
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