Re: Population count in SSE2, again

"Gerd Isenberg" <spamtrap@[EMAIL PROTECTED]
> wrote in message 
news:fdc6b0bd-c736-46fc-bc72-9d3d7dee490f@[EMAIL PROTECTED]
> Btw. you seem to introduce some penalties by mixing float and integer
> instructions, e.g. andnps instead of pandn, movaps instead of movdqa
> etc. See the intel optimization manual 5.1 General Rules On SIMD
> Integer code. Not sure whether this is an issue with pxor versus xorps
> as well, related to your other question on pxor throughput on core 2.

Agner Fog seems to think of this as an old wive's tale.  If you look
in instruction_tables.pdf on his web site he gives the unit (flt or
int) that the instruction goes to and all logical operations: pandn
andnps, andnpd as well as pxor, xorps, and xorpd, go to the int unit.
This is annoying in that a sequence such as

mulpd xmm0, xmm1
xorpd xmm0, xmm2
addpd xmm0, xmm3

The xorpd instruction to negate xmm0 before the addition takes three
clocks because its input came from the flt unit and its output will
go to the flt unit, the stall occurring even though it has 'pd' in its
name.  Same with movdqa, movaps, movapd reg, reg: all 6 forms go through
the int unit.  May be different on AMD processors, I haven't had the
op****tunity to check timing code there.  As a result, I normally
use the packed-single rather than packed-double or integer from
for the instructions because it's one byte shorter.  One can always
change things around and time everything again to see if it makes a
positive or negative difference.

-- 
write(*,*) transfer((/17.392111325966148d0,6.5794487871554595D-85, &
6.0134700243160014d-154/),(/'x'/)); end