"Cranky" <spamtrap@[EMAIL PROTECTED]
> wrote in message
news:975941fe-103e-4297-81c8-ba1042d7bb9d@[EMAIL PROTECTED]
> On Apr 4, 8:23 am, "Rod Pemberton" <spamt...@[EMAIL PROTECTED]
> wrote:
> Hi Rod,
> where did you get the above from, can't see it in my Intel pdf's.
> Is it an update for later models? Maybe that's why I don't see zero
> extension for P4/P3.
>
Cut and pasted (I fixed text arrows) from .pdf of:
IA-32 Intel Architecture Software Developer's Manual,
Volume 2B: Instruction Set Reference, N-Z
Order Number: 253667-018, January 2006
"PUSH-Push Word or Doubleword Onto the Stack" pg. 4-177 to 4-181
There probably are more recent versions. I pulled these from someone
else's
post:
ftp://download.intel.com/design/Pentium4/manuals/25366518.pdf
ftp://download.intel.com/design/Pentium4/manuals/25366618.pdf
ftp://download.intel.com/design/Pentium4/manuals/25366718.pdf
ftp://download.intel.com/design/Pentium4/manuals/25366818.pdf
ftp://download.intel.com/design/Pentium4/manuals/25366918.pdf
> I think the reason your seeing EFLAGS (P2) is due to the segment
> register being pushed as..
>
> ELSE StackAddrSize = 16
> ...
> ELSE (* OperandSize = 32 *)
> ...
> IF (SRC is CS or DS or ES or SS of FS or GS)
> SP <- (SP - 4);
> SS:SP <- SRC; (* Push word *) <--not dword for segment reg's
> FI;
>
> or something like that..
>
Since the method I used uses the trap flag and trap interrupt, I thought
perhaps the trap interrupt returns: flags,CS,IP for IRET, overwrite the
stack... So, I whipped up another test that disables interrupts, NMI, and
doesn't use the trap flag, call instruction, or interrupts, etc.
The results for the K6-2 and Pentium MMX are the same. They push a 32-bit
value with upper 16-bits zeroed.
The results for the Intel Pentium II was different. It only pushed
16-bits:
1) it appears the flags came from trap interrupt returns
2) the P2 is ignoring the db 0x66 prefix
So, I have to retract my previous statement that it pushed 32-bits...
Sorry
about that. Anyway, now I'd have to say the P2 has a bug... not an
undefined behavior. It should be pu****ng 32-bits with db 0x66.
Rod Pemberton
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