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Programming > Assembly x86 > mov seg, reg/mo...
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mov seg, reg/mov reg, seg and size prefix

by "rhyde@[EMAIL PROTECTED] " <spamtrap@[EMAIL PROTECTED] > Mar 18, 2008 at 02:24 PM

Hi all,

To test HLA, I generate several different equivalent source files in
FASM, MASM, NASM, Gas, and HLA, compile them, disassemble the
executables they produce, and then diff the disassembly files. This
works great as long as HLA can be coerced to produce object code in
the exact same form as (each of) the other assemblers. As the test is
automated, it provides a great regression test tool that I can run
anytime I make changes to the HLA system.

In the past, if a particular assembler generated different code from
HLA, and both code sequences were semantically equivalent (i.e.,
different encodings for the same instruction) I simply disabled that
particular test and left it up to one of the other tests (with a
different assembler) to catch any defects that crept into the code
generator.

For HLA v1.102, however, I'm adding a feature that allows HLA v1.102
to generate the same "object code signature" as MASM, FASM, TASM, Gas,
and NASM, as much as is reasonable (i.e., I don't generate bad opcodes
if one of these assemblers has a bug in the instruction encoding).

One curious thing I've noticed is that the presence/absence of a 0x66
size prefix byte, for 16-bit only instructions, is all over the map.
For example, consider the following two instructions:

mov ds, ax
mov ax, ds

Clearly, there are only 16-bit versions of these two instructions.
Some assemblers *always* put a 0x66 size prefix byte in front of the
encodings, some never do, and at least one (MASM) puts size prefix
bytes before one but not the other.

The question I have is this: Is the some situation (i.e., some
specific CPU) where the size prefix is absolutely necessary?  Quite
honestly, I've never executed these instructions in 32-bit mode, so I
don't even know if they work. But given the number of assemblers that
emit these instructions without the size prefix (in 32-bit mode), I
assume that they still work properly? Or is this just a bug in those
assemblers?

The Intel documentation states: "In 32-bit mode, the assembler may
insert the 16-bit operand-size prefix with this instruction (see the
following "Description" section for further information). "

As I read this, the 0x66 prefix byte is purely optional. However, that
statement may not apply to some non-Intel CPUs (unlikely, but I'm
asking because I just don't know).

Is there any reason to waste a byte and emit these prefixes?
Thanks,
Randy Hyde




 10 Posts in Topic:
mov seg, reg/mov reg, seg and size prefix
"rhyde@[EMAIL PROTEC  2008-03-18 14:24:20 
Re: mov seg, reg/mov reg, seg and size prefix
"Wolfgang Kern"  2008-03-19 00:54:57 
Re: mov seg, reg/mov reg, seg and size prefix
s_dubrovich <spamtrap@  2008-03-18 16:23:32 
Re: mov seg, reg/mov reg, seg and size prefix
Frank Kotler <spamtra  2008-03-19 06:55:37 
Re: mov seg, reg/mov reg, seg and size prefix
"Rod Pemberton"  2008-03-19 09:05:52 
Re: mov seg, reg/mov reg, seg and size prefix
Frank Kotler <spamtra  2008-03-19 20:17:25 
Re: mov seg, reg/mov reg, seg and size prefix
"Rod Pemberton"  2008-03-20 05:39:58 
Re: mov seg, reg/mov reg, seg and size prefix
Frank Kotler <spamtra  2008-03-21 09:38:20 
Re: mov seg, reg/mov reg, seg and size prefix
"rhyde@[EMAIL PROTEC  2008-03-27 09:29:22 
Re: mov seg, reg/mov reg, seg and size prefix
"Rod Pemberton"  2008-03-27 15:51:32 

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tan12V112 Tue May 13 16:46:22 CDT 2008.