On Mar 17, 12:12 pm, "Wolfgang Kern" <spamt...@[EMAIL PROTECTED]
> wrote:
> Stargazer wrote:
>
> ...
>
> > I measured CPU clocks elapsed between the first assembly instruction
> > executed at interrupt's entry point in IDT and beginning of the C code
> > of user-defined interrupt handler and the result was a big
> > surprise :-) It took about 2500 cycles despite that I have only a
> > handful of assembly instructions before a call to user-supplied IRQ
> > handler.
>
> A ****d IRQ (just EOI and IRET) takes about 200 cycles, if measured in
> an unproteced environment (ie: my OS where all code run with PL0).
>
> One big cycle loss is in the PL-transition, especially if hardware
> task-switches are in use.
I use "classical" monolithic embedded OS model: both OS and
application run on PL0, no PL switches, no address spaces (CR0.PG=0)
and TSS are not used.
200-300 cycles is what I get without that "inc" instruction.
D.
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