In alt.lang.asm Skybuck Flying <BloodyShame@[EMAIL PROTECTED]
> wrote in part:
> Do cpu's nowadays have multiple carry flags underneath ? I
> would think so... otherwise how can they possible execute
> multiple integer instructions ?
Yes, AFAIK the modern CPUs do register renaming on flags.
Otherwise, as you point out, parallelism stalls.
The problems come with instructions that only update some of
the flags (like INC), or where you create a dependency chains
(like your BT/ADC) without independant filler.
Your BT/ADC X, BT/ADC Y, BT/ADC Z will be reordered and
interally executed as:
BT X [flag0]
BT Y [flag1]
BT Z [flag2]
ADC X [flag0]
ADC Y [flag1]
ADC Z [flag2]
To allow multiple instructions running per clock.
Actually it is more complex than this, because your
ADCs are actually load, add, and store micro-ops.
-- Robert
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